Exploration of Dual Issue in-order designs based on Shakti C-Class

Abstract: The Shakti C-Class is an open-source processor built on the RISC-V architecture. It features a simple, in-order, single-issue, 6-stage pipeline design, while incorporating several elements typically found in superscalar processors, such as a scoreboard and deeper pipeline buffers to enhance performance. However, these features are found to be underutilized in the baseline architecture. To address this, we present a case study on upgrading the single-issue pipeline to a dual-issue pipeline with details of how each micro-architectural change affected the area and performance. We achieve a best case CoreMark score of 3.74 CM/MHz, representing a 42.2% improvement, with 7.6% of area overhead compared to the baseline design.

Event Details
Title: Exploration of Dual Issue in-order designs based on Shakti C-Class
Date: November 26, 2025 at 3:00 PM
Venue: CSD-308
Speaker: Mr. MOUNA KRISHNA GADHIRAJU (EE22S082)
Guide: Dr. Nitin Chandrachoodan
Type: MS seminar