Abstract: Power semiconductor devices are among the most failure-prone components in power electronic converters. Gradual degradation of these devices that may lead to catastrophic failures can be prevented if detected at an early stage. Reliable diagnosis of such incipient faults is therefore essential to improve converter reliability and enable predictive maintenance.

This work presents an approach for the diagnosis of slowly developing switch faults in grid-connected voltage source inverters. A potential fault signature capable of distinguishing healthy and degraded switches is identified. A model-based observer framework is employed to estimate and analyze the fault signature for the early diagnosis of switch degradation.

The seminar presents the system modeling, simulation studies, and preliminary results. The proposed approach aims to enable early fault detection, thereby facilitating condition monitoring and predictive maintenance of power electronic converters.

Event Details
Title: A Diagnosis Strategy for Power Semiconductor Switch Degradation in Grid-Connected Voltage Source Inverters
Date: August 18, 2026 at 3:00 PM
Venue: ESB244
Speaker: Mr. Ajith M A (EE22D008)
Guide: Dr. Krishna Vasudevan
Type: PHD seminar

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